Bidirectional buffer interface chip: CH421


Overview

The CH421A is an interface chip that provides bidirectional data buffering. The CH421A has two 8-bit passive parallel ports, X and Y, which enable bidirectional asynchronous data exchange between the X and Y ends by sharing a 66-byte dual-port data buffer. CH421A supports simultaneous operation at both ends. It is suitable for connecting single-chip microcomputer and single-chip microcomputer, single-chip microcomputer and DSP/MCU, as well as single-chip microcomputer and other main control terminals with active parallel interface, such as the print port of computer or the local port of CH365. The figure below is a block diagram of its general application.

Features

  • A general-purpose 8-bit bidirectional data bus that can be directly connected to the microcontroller or DSP/MCU system bus.
  • Based on dual port SRAM, provide a shared 66-byte data buffer to the X and Y terminals.
  • One byte of unidirectional buffer is provided for each of the X end and the Y end, that is, one end can be readable at both ends.
  • Active-low general-purpose parallel interface control signals: chip select control line, read operation line, write operation line.
  • Only two address bits are occupied: the index address port and the data port, the internal index address is automatically incremented after the data port is read or written.
  • Provides software-controllable interrupt output pin INT# at both ends, active low.
  • Asynchronous data exchange, support X and Y both sides of the simultaneous read and write operations, no synchronization and waiting.
  • The maximum data transfer speed is no less than 7M bytes per second.
  • Supports 5V supply voltage and 3.3V supply voltage.
  • The SOP-28 is available in a lead-free package, compatible with RoHS.