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CH392DS1.PDF
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CH392 datasheet. TCP/IP protocol stack chip, integrated 10M MAC and PHY transceiver, supports SPI/asynchronous serial port, built-in DHCP, ARP, UDP and TCP protocol firmware, supports MCU system to connect to Ethernet. |
CH395DS1.PDF
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CH395 datasheet. TCP/IP Ethernet protocol stack chip, integrated 10/100M MAC and PHY transceiver, built-in DHCP, ARP, ICMP, IGMP, UDP and TCP protocol firmware, supports SPI/8-bit parallel port/asynchronous serial port and up to 8 sockets, supports MCU system to connect to Ethernet. |
CH390DS1.PDF
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CH390 Datasheet, CH390 is an industrial-grade Ethernet controller chip with its own 10/100M Ethernet Media Access Controller (MAC) and Physical Layer (PHY), supporting CAT3, 4, 5 for 10BASE-T and CAT5, 6 for 100BASE-TX connections, supporting HP Auto-MDIX, low-power consumption design, and complying with IEEE 802.3u specification. CH390 has built-in 16K bytes SRAM, supports 3.3V or 2.5V parallel interface and SPI serial interface for compatibility with various MCUs, MPUs, DSPs and other controllers. |
CH182DS1.PDF
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CH182 datasheet, CH182 is an industrial grade 10/100M Ethernet PHY transceiver with Auto-MDIX support. CH182 internally includes Physical Coding Sublayer (PCS), Physical Media Access Layer (PMA), Twisted Pair Physical Medium Dependent (TP-PMD), 10BASE-TX encoder/decoder, Twisted Pair Media Attachment Unit (TPMAU), MII and RMII interfaces, and other modules required for Ethernet Transceiver functions. |
CH9120DS1.PDF
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CH9120 datasheet. CH9120 realizes bidirectional transparent transmission between UART and Ethernet, supports UART and network configuration. CH9120 has built-in 10M PHY, and supports serial device to connect to Ethernet. |
CH9121DS1.PDF
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CH9121 datasheet. Realize transparent transmission between UART and Ethernet. It supports UART and network configuration. It has built-in PHY, and supports serial device to connect to the network. |