Overview

The CH32V203 is an industrial-grade enhanced low-power general-purpose MCU based on 32-bit RISC-V core. The CH32V203 features high performance, and supports up to 144MHz system clock frequency. The operating power consumption can be as low as 49.3uA/MHz. CH32V203 integrates 2-channel USB interface which supports USB Host and USB Device functions. The CH32V203 provides 1-channel CAN interface (2.0B active), 2-channel OPA, 4 UARTs, 2 IICs, 12-bit ADC, 10-channel TouchKey and other peripheral resources. Several packages such as TSSOP20, QFN28 QFN48, LQFP32 and LQFP48 are available for users.

System Block Diagram

Features

• Qingke V4B, up to 144MHz system clock frequency.
• Single-cycle multiplication and hardware division.
• 20KB SRAM, 64KB Flash.
• Supply voltage: 2.5V/3.3V. GPIO unit is supplied independently.
• Low-power modes: sleep/stop/standby.
• Down to 49.3uA/MHz in Run mode.
• Down to 19.4uA/MHz in Sleep mode.
• Power-on/power-down reset (POR/PDR), programmable voltage detector (PVD).
• 1 x 18-channel general DMA controllers.
• 2 amplifiers.
• 10-channel 12-bit ADC, 10-channel TouchKey.
• 4 timers.
• One USB2.0 full-speed host/device interface.
• One USB2.0 full-speed device interface.
• 4 UARTs.
• One CAN interface (2.0B active).
• 2 IIC interfaces, 2 SPI interfaces.
• 37 I/O ports, can be mapped to 16 external interrupts.
• CRC calculation unit, 96-bit unique ID.
• Serial 2-wire debug interface.
• Packages: TSSOP20, QFN28, QFN48, LQFP32, LQFP48.

Product Selection Guide

Technical Resources

1. Datasheet: CH32V203DS0.PDF，CH32FV2x_V3xRM.PDF
2. CH32V203EVT evaluation board manual and reference routines: CH32V20xEVT.ZIP
3. Integrated development environment (IDE): MounRiver Studio(MRS)