CH548 is an enhanced E8051 core MCU, compatible with MCS51 instruction set. 79% of its instructions are single-byte single-cycle instructions. CH548 features high run speed. CH548 has built-in 32KB Flash-ROM and 2K+256B RAM. CH548 has built-in USB controller and USB transceiver. CH548 supports USB Host mode and USB Device mode, supports USB2.0 full-speed (12Mbps) and low-speed (1.5Mbps) transfer, and supports USB PD and Type-C. CH548 supports up to 64 bytes of data packet, with built-in FIFO, and supports DMA. CH548 provides abundant interface sources, including 2 UARTs, 8-channel PWM. CH548 also has 1-channel master/slave SPI, 16-channel 12-bit ADC, and supports voltage comparator. CH548 has 3 built-in timers and 3-channel signal capture. CH548 supports up to 44 GPIOs.
System Block Diagram
- Enhanced E8051 core CPU, the speed is 8-15 times faster than that of standard MCS51, with special XRAM data fast copy instruction.
- Built-in 32KB Code Flash, 1KB Data Flash and 3KB BootLoader. ISP through USB or UART.
- Built-in 2KB XRAM and internal 256B RAM.
- Built-in USB controller and USB transceiver, support USB2.0 full-speed and low-speed host/device. DMA capability.
- Built-in Type-C CC controller supports USB PD.
- USB flash drive file-level sub-routine library that supports FAT12/FAT16/FAT32 file system, to implement read/write USB flash drives.
- 3 timers/counters. 3-channel signal capture and 8-channel PWM output.
- 2 full-duplex UARTs.
- One SPI communication interface supports master/slave mode.
- 16-channel 12-bit ADC multiplexed with GPIO.
- Built-in clock and PLL. An external crystal oscillator is also supported.
- Packages: SOP16, LQFP48.
Downloading: USB interface /UART